Feynman Gate

Feynman gate is a 2*2 one through reversible gate. The input vector is I(A, B) and the output vector is O(P, Q). The outputs are defined by P=A, Q=A xor B. Quantum cost of a Feynman gate is 1. Feynman Gate (FG) can be used as a copying gate. Since a fan-out is not allowed in reversible logic, this gate is useful for duplication of the required outputs. The architecture of the gate is shown below.

The truth table of the Feynman gate is given below

The VHDL code for the Feynman gate is:-

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--Author: Aneesh Raveendran

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Library ieee;

Use ieee std_logic.1164.all;

Entity feynmangate is Port(

                A, B     :         in      std_logic;

                 P, Q    :         out    std_logic);

end feynmangate;

architecture RTL of feynmangate is

begin

                process (A, B)

                begin

                P<= A;

                Q<= A xor B;

                end process;

end RTL;